Modern processors employed in computer systems use various techniques to improve their performance. One of these techniques is for the processor to use dynamic instruction scheduling in which the processor executes instructions out of order, i.e., in an order different than that specified by the programmer or compiler. For example, dynamic instruction scheduling may allow the processor to speculate as to whether a branch instruction will be taken or not taken based on some prior history. If a branch instruction is predicted to be taken, then the flow of the program is altered, i.e., the sequence of instruction execution is altered. If the branch instruction is predicted to not be taken, then the following sequential instructions are executed. In either case, the stream of instructions executed are said to be “speculatively” executed. If the branch is predicted incorrectly, i.e., the processor predicted incorrectly as to whether a branch instruction will be taken or not, the speculatively executed instructions are flushed.
Processors may operate in a mode, commonly referred to as a “real mode,” where no virtual address translation is performed. That is, the effective address, i.e., the address of the program or compiler, is used as the real address, i.e., the address of physical memory. If the effective address does not correspond to the real address, then the computer system may experience what is commonly referred to as a “check stop.” A check stop may refer to crashing of the computer system as a result of attempting to locate a real address that does not exist in physical memory.
In a computer system incorporating the above technique to improve processor performance, such as a processor with out-of-order execution, certain instructions, e.g., load instruction, may not be speculatively executed in order to prevent a check stop from occurring while operating in real mode. For example, when operating in real mode, the processor will not speculatively execute a load instruction after the processor predicts a branch instruction will be taken or not taken in order to prevent a check stop. By prohibiting speculative execution of certain instructions, such as load instructions, to ensure against check stops, processor performance is hindered.
Therefore, there is a need in the art to be able to speculatively execute instructions while avoiding check stops when operating in real mode.